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The NXT's microcontroller has a total of 64 KiB of RAM. Observe that 32 KiB is half of that total. If we assume that the firmware lays out RAM starting from the lowest address and going up, and that the firmware uses more than 0 bytes of RAM (both very reasonable assumptions), there is no possible location the firmware could put this memory pool that doesn't intersect with the address 32 KiB past the start of RAM, 0x00208000.